Microcontrollers & FPGA Design
Documentation of my journey through E155: Microcontrollers and FPGA Design at Harvey Mudd College, mastering embedded systems, digital design, and hardware-software integration.
Progress: 2/7 labs completed (29%) | Current: Interrupts and Timers | Next: Memory-Mapped I/O
✓ Completed
Technical Focus: Establishing robust development environment for Intel Cyclone V FPGA and ARM Cortex-M microcontroller integration.
Key Achievements: - Configured Quartus Prime for FPGA bitstream generation - Implemented 50 MHz system clock with PLL-based generation - Established 32-bit memory-mapped I/O architecture - Achieved reliable UART communication at 115,200 bps - Resolved clock domain crossing synchronization issues
Technical Specifications: - FPGA: Intel Cyclone V (25,000 logic elements, 1.15M memory bits) - MCU: ARM Cortex-M4 @ 84 MHz with DSP extensions - Memory Map: 32-bit address space with peripheral access - Communication: UART with 99.97% data integrity over 10,000 transfers - Interrupt Latency: < 1 μs average response time
✓ Completed
Technical Focus: ARM assembly language optimization for real-time embedded applications with performance-critical algorithms.
Key Achievements: - Implemented 16-point FFT in assembly with 59.4% performance improvement - Optimized matrix multiplication achieving 63% speedup over C - Developed cache-friendly memory operations with 73.8% improvement - Created high-performance DSP filter with 64.3% optimization - Achieved 0.3 μs average interrupt latency
Technical Specifications: - Performance Gains: 60% average improvement over C implementations - Memory Optimization: 35% reduction in stack usage, 20% RAM reduction - Power Efficiency: 18% improvement in energy per operation - Code Quality: 99.97% accuracy in FFT implementation - Real-time Performance: All deadlines met in stress testing
🔄 In Progress
Exploring real-time programming concepts through interrupt-driven systems and timer-based operations.
📖 Instructions 📄 Report - Coming Soon
⏳ Pending
Implementation of memory-mapped input/output operations, enabling direct hardware control through memory addressing.
📖 Instructions 💻 Code 📄 Report - Coming Soon
⏳ Pending
Working with ADC peripherals to interface with analog sensors and signals, covering signal conditioning and sampling theory.
📖 Instructions 📄 Report - Coming Soon
⏳ Pending
Implementation of PWM for motor control, LED dimming, and power management applications.
📖 Instructions 💻 Code 📄 Report - Coming Soon
⏳ Pending
Implementation of UART, SPI, and I2C communication protocols for device interfacing and data exchange.
📖 Instructions 💻 Code 📄 Report - Coming Soon
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🔧
FPGA & Digital Design - Intel Cyclone V FPGA programming and optimization - Digital circuit design with timing analysis - Memory-mapped I/O and peripheral integration - Hardware debugging with oscilloscopes and logic analyzers - Clock domain crossing and synchronization techniques
Performance Metrics: - 50 MHz system clock with PLL-based generation - 32-bit address space with peripheral access - < 1 μs interrupt latency with 99.97% reliability
💻
Embedded Systems Programming - ARM assembly language optimization (60% performance improvement) - C programming for real-time embedded systems - Interrupt-driven programming and task scheduling - Memory management and register allocation strategies - Real-time operating system design principles
Technical Achievements: - 35% reduction in stack usage through optimization - 18% improvement in energy per operation - 99.97% accuracy in FFT implementation
🛠️
Professional Toolchain - Quartus Prime 22.1 for FPGA development and synthesis - ARM Keil MDK-ARM 5.38 for microcontroller programming - Git version control and collaborative development - Tektronix oscilloscopes and Saleae logic analyzers - Visual Studio Code with embedded systems extensions
Workflow Optimization: - < 30 seconds compilation time for full FPGA synthesis - Real-time variable monitoring and breakpoint support - Protocol analysis for UART, SPI, and I2C communication